1. Field of the Disclosure
The present invention relates generally semiconductor processing. More specifically, examples of the present invention are related to semiconductor processing of stacked integrated circuit systems.
2. Background
As integrated circuit technologies continue to advance, there are continuing efforts to increase performance and density, improve form factor, and reduce costs. The implementation of stacked three dimensional integrated circuits has been one approach that designers sometimes use to realize these benefits. The advances in wafer bonding with very precise alignments make it possible to fabricate stacked chips at a wafer-level. The possible applications could include logic chips that are bonded to memory chips, image sensor chips, among others. This offers the advantage of smaller form factors, improved performance, and lower costs.
A key challenge when implementing stacked three dimensional integrated circuit systems, in which there are continuing efforts to provide smaller, thinner and faster systems, relates to through silicon vias (TSVs) that have to penetrate the middle or intermediate silicon wafers of a 3 wafer stacked imaging systems. The increased thicknesses of the middle wafers decrease the yields of the through silicon vias and limit their density. For instance, the increased thicknesses of the middle wafers increase the aspect ratios of the through silicon vias in the middle wafers, which decreases yields and often requires more costly etch and fill processes.
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.